CoE1502: Using Logic Analyzer
In order to test a real hardware design one need to be able to measure
the actual values of bus and signal lines. Logic analyzer is a great aid
for this purpose. With it one can collect output signals and view wave
In our class we are using HP 1600 series logic analyzer.
Our design will be synthesized and uploaded to the FPGA device on the
"Wild-One" board. The board is connected to the logic analyzer. Thus we
can run tests on our design and observe the results with the logic analyzer.
How to use the Logic Analyzer (LA):
The LA has several sets of buttons on its front pannel:
The LA also has a 3" disk drive where one can save current setup or waweforms.
quick menu keys -- allow you to go to a particular menu of the system
navigation keys -- allow you to move cursor in 4 directions and select
or confirm actions.
Arrows -- move cursor
Select -- selects an option or performs the highlited function
Done -- saves assignments and closes popup menus
Knob -- by rotating the knob you can change values in some fields or scroll
the display, or move cursor
data entry keys -- for entering signal names and other data
run and stop keys -- starts/stops measurement
When you want to make measurements with the LA, you have to go through
the following steps:
Map to target (CONFIG. key)
Set up analyzers (FORMAT key)
Set up trigger (TRIGGER key)
Run measurement (RUN key)
View data (LIST / WAVEFORM keys)
Map to Target (CONFIG. key)
This step configures the LA. Normally you do not need to make any changes
here and can skip to the next step.
Connect probes -- this is already done and the LA is connected to
the Wild-One board with the FPGA on it.
Set type -- selects operating mode of the LA
Assign pods -- defines connections between the LA and the tested
Set Up Analyzers (FORMAT key)
Set modes and clocks -- The data can be gathered at certain time
intervals (using clocks) or at specific events (triggers). Here we make
a choice, how we would like to collect data.
Group bits under labels -- For our convenience we can create logical
busses by collecting incoming signals in a bus and giving the bus a name.
Later in the waweform the collection of these signals will be labeled by
the bus name.
Set Up Trigger (TRIGGER key)
Define terms -- define trigger variables to match certain events
(patterns, ranges, edges) in your target system
Configure arming control -- if you want the LA to trigger an external
instrument or vica verse
Set up trigger sequence -- set up when the LA starts and stops collecting
data, and which data is to be gathered.
Run Measurement (RUN key)
Select single or repetive -- a single run will run until the memory
is full. a repetitive will run until you press STOP ot until a stop condition
(defined before) is fullfilled
If nothing happens, press Stop and find out why (incorrect triggers,
Gather data -- press RUN and hold your breath...
View Data (LIST / WAVEFORM keys)
Here we can view the results of our test run and see if we get what we
After this step you can go back to trigger setup, or make changes in your
design, synthesize, upload and run the measurement again.
Search for patterns
For more information you can check out CoE0501/CoE1502
slides on logic analyzer.